Bibliographic Details
| Title: |
Voice recording and playback apparatus, and alarm system with voice recording and playback apparatus |
| Patent Number: |
5,604,479 |
| Publication Date: |
February 18, 1997 |
| Appl. No: |
08/620,301 |
| Application Filed: |
March 22, 1996 |
| Abstract: |
A voice recording and playback apparatus includes a memory unit having addressable memory regions, a voice input unit for converting a user voice input into an electrical signal, and a processor for storing the electrical signal from the voice input unit as a voice message in the memory unit. A recording address generator, which includes a recording address decoder and a plurality of recording switches for connecting a respective input of the recording address decoder to a voltage source, provides a corresponding recording address to the processor to enable the latter to store the voice message in a corresponding one of the memory regions of the memory unit when one of the recording switches is closed. A playback address generator, which includes a playback address decoder and a plurality of playback switches for connecting a respective input of the playback address decoder to the voltage source, provides a corresponding playback address to the processor to enable the latter to retrieve the voice message in a corresponding one of the memory regions of the memory unit when one of the playback switches is closed. An alarm system which incorporates the voice recording and playback apparatus is also disclosed. |
| Inventors: |
Chang, Yen-Pin (Taipei, TWX) |
| Claim: |
I claim |
| Claim: |
1. A voice recording and playback apparatus, comprising |
| Claim: |
a memory unit having addressable memory regions; |
| Claim: |
a voice input unit for converting a user voice input into an electrical signal; |
| Claim: |
processor means, connected to said memory unit and said voice input unit, for storing the electrical signal from said voice input unit as a voice message in said memory unit; |
| Claim: |
a recording address generator including a recording address decoder which has a plurality of inputs and an output end connected to said processor means, and a plurality of recording switches for connecting a respective one of said inputs of said recording address decoder to a voltage source, said recording address decoder providing a corresponding recording address to said processor means to enable said processor means to store the voice message in a corresponding one of said memory regions of said memory unit when one of said recording switches is closed; |
| Claim: |
a playback address generator including a playback address decoder which has a plurality of inputs and an output end connected to said processor means, and a plurality of playback switches for connecting a respective one of said inputs of said playback address decoder to the voltage source, said playback address decoder providing a corresponding playback address to said processor means to enable said processor means to retrieve the voice message in a corresponding one of said memory regions of said memory unit when one of said playback switches is closed; |
| Claim: |
amplifier means, connected to said processor means, for amplifying the voice message retrieved by said processor means; and |
| Claim: |
speaker means, connected to said amplifier means, for broadcasting the voice message retrieved by said processor means. |
| Claim: |
2. The voice recording and playback apparatus as claimed in claim 1, further comprising a connector which has a plurality of connector terminals connected respectively to said inputs of said playback address decoder. |
| Claim: |
3. An alarm system, comprising |
| Claim: |
a voice recording and playback apparatus including |
| Claim: |
speaker means, connected to said amplifier means, for broadcasting the voice message retrieved by said processor means; |
| Claim: |
a thyristor set including a plurality of thyristors, each of which has a first thyristor terminal connected to a respective one of said inputs of said playback address decoder, a second thyristor terminal connected to the voltage source, and a trigger input; and |
| Claim: |
a detector unit including a plurality of alarm switches, each of which connects said trigger input of a respective one of said thyristors to the voltage source; |
| Claim: |
whereby, closure of one of said alarm switches triggers the respective one of said thyristors into conduction, thereby connecting one of said inputs of said playback address decoder to the voltage source. |
| Claim: |
4. The alarm system as claimed in claim 3, wherein each of said thyristors is a silicon controlled rectifier. |
| Current U.S. Class: |
3403/847; 360/5; 360/6; 340/692; 340/460 |
| Current International Class: |
G08B 310 |
| Patent References Cited: |
4560978 December 1985 Lemelson
4652859 March 1987 Van Wienen |
| Primary Examiner: |
Hofsass, Jeffery |
| Assistant Examiner: |
Pope, Daryl C. |
| Attorney, Agent or Firm: |
Foley & Lardner |
| Accession Number: |
edspgr.05604479 |
| Database: |
USPTO Patent Grants |
