Bibliographic Details
| Title: |
APPLYING NEGATIVE GATE VOLTAGE TO WORDLINES ADJACENT TO WORDLINE ASSOCIATED WITH READ OR VERIFY TO REDUCE ADJACENT WORDLINE DISTURB |
| Document Number: |
20100128521 |
| Publication Date: |
May 27, 2010 |
| Appl. No: |
12/275663 |
| Application Filed: |
November 21, 2008 |
| Abstract: |
Systems, methods, and devices that facilitate applying a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected during a read or verify operation to facilitate reducing adjacent wordline disturb are presented. A memory component can comprise an optimized operation component that can apply a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected for a read or verify operation, based at least in part on predefined operation criteria, to facilitate reducing adjacent wordline disturb in the selected memory cell to facilitate reducing a shift in the voltage threshold and maintain a desired operation window. The optimized operation component optionally can include an evaluator component that can facilitate determining whether a negative gate voltage applied to adjacent wordlines is to be adjusted to facilitate reducing adjacent wordline disturb below a predetermined threshold amount. |
| Inventors: |
Mizuguchi, Yuji (Santa Clara, CA, US); Randolph, Mark W. (San Jose, CA, US); Hamilton, Darlene Gay (White Salmon, WA, US); He, Yi (Fremont, CA, US); Liu, Zhizheng (San Jose, CA, US); Lin, Yanxia (Emma) (San Jose, CA, US); Yi, Xianmin (Santa Clara, CA, US); Kathawala, Gulzar (Santa Clara, CA, US); Joshi, Amol Ramesh (Sunnyvale, CA, US); Chang, Kuo-Tung (Saratoga, CA, US); Runnion, Edward Franklin (San Jose, CA, US); Lee, Sung-Chul (Cupertino, CA, US); Chung, Sung-Yong (Davis, CA, US); Liu, Yanxiang (Sunnyvale, CA, US); Sun, Yu (Saratoga, CA, US) |
| Assignees: |
SPANSION LLC (Sunnyvale, CA, US) |
| Claim: |
1. A system that improves operations in a memory component, comprising: the memory component comprising a plurality of storage locations to facilitate data storage; and an optimized operation component that facilitates application of a predefined negative gate voltage to wordlines adjacent to at least one wordline associated with at least one storage location selected for at least one of a read operation or a verify operation to facilitate reduction of disturb in the at least one storage location. |
| Claim: |
2. The system of claim 1, further comprising: a selection component that facilitates application of the predefined negative gate voltage to the wordlines adjacent to the at least one wordline associated with the at least one storage location and a respective predefined gate voltage, a respective predefined drain voltage, and a respective predefined source voltage to the at least one storage location to facilitate performance of the at least one of the read operation or the verify operation. |
| Claim: |
3. The system of claim 1, wherein application of the predefined negative gate voltage to the wordlines adjacent to the at least one wordline associated with the at least one storage location facilitates reduction in an amount of shift in at least one threshold voltage level associated with the at least one storage location to facilitate reading or verifying data stored in the at least one storage location. |
| Claim: |
4. The system of claim 1, further comprising: an evaluator component that monitors, measures, and evaluates at least one of an amount of adjacent wordline disturb, an amount of shift in a threshold voltage level associated with at least one data level in the at least one storage location, or an amount of shift in a drain-source current level associated with the at least one storage location. |
| Claim: |
5. The system of claim 4, the optimized operation component determines whether at least one of the amount of adjacent wordline disturb, the amount of shift in a threshold voltage level associated with at least one data level in the at least one storage location, or the amount of shift in a drain-source current level associated with the at least one storage location respectively meets or exceeds a predetermined threshold amount of adjacent wordline disturb, a predetermined threshold amount of shift in the threshold voltage level, or a predetermined threshold amount of shift in the drain-source current. |
| Claim: |
6. The system of claim 5, the optimized operation component modifies the predefined negative gate voltage to a new negative gate voltage when it is determined that at least one of the amount of adjacent wordline disturb, the amount of shift in a threshold voltage level associated with at least one data level in the at least one storage location, or the amount of shift in a drain-source current level associated with the at least one storage location respectively meets or exceeds a predetermined threshold amount of adjacent wordline disturb, a predetermined threshold amount of shift in the threshold voltage level, or a predetermined threshold amount of shift in the drain-source current, to facilitate reducing at least one of the amount of adjacent wordline disturb, the amount of shift in a threshold voltage level associated with at least one data level in the at least one storage location, or the amount of shift in a drain-source current level associated with the at least one storage location. |
| Claim: |
7. The system of claim 6, the optimized operation component applies the new negative gate voltage to wordlines adjacent to at least one wordline associated with at least one storage location selected for at least one of a read operation or a verify operation. |
| Claim: |
8. The system of claim 1, further comprising: an intelligent component that evaluates at least one of current or historical information and infers at least one automated function to be performed by the optimized operation component based at least in part on the at least one of current or historical information. |
| Claim: |
9. The system of claim 8, the intelligent component infers at least one of the predefined negative gate voltage is to be modified to a disparate negative gate voltage or a frequency of evaluating adjacent wordline disturb, threshold voltage shift, or drain-source current shift, associated with the at least one storage location is to be increased so that the at least one storage location is evaluated more frequently to determine whether the predefined negative gate voltage is to be modified in order to facilitate modifying the negative gate voltage applied to adjacent wordlines during the at least one of a read operation or a verify operation to facilitate a reduction in at least one of an amount of adjacent wordline disturb, an amount of shift in a threshold voltage level associated with at least one data level in the at least one storage location, or an amount of shift in a drain-source current level associated with the at least one storage location. |
| Claim: |
10. The system of claim 1, further comprising: a storage component that stores information related to at least one of setting, adjusting, or applying a predefined negative gate voltage to wordlines adjacent to the at least one wordline associated with the at least one storage location during the at least one of a read operation or verify operation on the at least one storage location. |
| Claim: |
11. An electronic device comprising the system of claim 1. |
| Claim: |
12. The electronic device of claim 11, the electronic device is one of a computer, a cellular phone, a digital phone, a video device, a smart card, a personal digital assistant, a television, an electronic game, a digital camera, an electronic organizer, an audio player, an audio recorder, an electronic device associated with digital rights management, a Personal Computer Memory Card International Association (PCMCIA) card, a trusted platform module (TPM), an electronic control unit associated with a motor vehicle, a global positioning satellite (GPS) device, an electronic device associated with an airplane, an electronic device associated with an industrial control system, a Hardware Security Module (HSM), a set-top box, a secure memory device with computational capabilities, or an electronic device with at least one tamper-resistant chip. |
| Claim: |
13. A method for improving operations in a memory, comprising: applying a predefined negative gate voltage to at least one wordline adjacent to at least one selected wordline associated with at least one memory cell selected for at least one of a read operation or verify operation to facilitate reducing a shift in voltage threshold associated with a data state of the at least one selected memory cell in the memory; and applying a respective predefined gate voltage, predefined drain voltage, and predefined source voltage to the at least one selected memory cell to facilitate performing the at least one of a read operation or a verify operation to facilitate reading or verifying data stored in the at least one selected memory cell based at least in part on a received read command or verify command. |
| Claim: |
14. The method of claim 13, further comprising: selecting the at least one selected memory cell to perform at least one the read operation or the verify operation based at least in part on at least one of a received read command or a received verify command; and selecting the at least one wordline adjacent to at least one wordline associated with the at least one selected memory cell to facilitate applying the predefined negative gate voltage to the at least one wordline adjacent to the at least one selected wordline. |
| Claim: |
15. The method of claim 13, further comprising: monitoring at least one of an amount of adjacent wordline disturb, an amount of shift in a threshold voltage level associated with the at least one selected memory cell, or an amount of shift in a drain-source current level associated with the at least one selected memory cell; and evaluating the at least one of the amount of adjacent wordline disturb, the amount of shift in a threshold voltage level associated with the at least one selected memory cell, or the amount of shift in a drain-source current level associated with the at least one selected memory cell. |
| Claim: |
16. The method of claim 15, further comprising: determining whether at least one of the at least one of the amount of adjacent wordline disturb, the amount of shift in a threshold voltage level associated with the at least one selected memory cell, or the amount of shift in a drain-source current level associated with the at least one selected memory cell meets or exceeds a respective predetermined threshold amount. |
| Claim: |
17. The method of claim 16, further comprising: adjusting the predefined negative gate voltage applied to at least one wordline adjacent to at least one selected wordline associated with at least one memory cell selected for at least one of a read operation or verify operation to a specified disparate negative gate voltage when at least one of the amount of adjacent wordline disturb, the amount of shift in a threshold voltage level associated with the at least one selected memory cell, or the amount of shift in a drain-source current level associated with the at least one selected memory cell meets or exceeds a respective predetermined threshold amount. |
| Claim: |
18. The method of claim 17, further comprising: applying the specified disparate negative gate voltage to at least one wordline adjacent to at least one selected wordline associated with at least one memory cell selected for at least one of a read operation or verify operation. |
| Claim: |
19. A system that facilitates improved operations associated with a memory, comprising: means for providing a predefined negative gate voltage to wordlines adjacent to at least one selected wordline associated with at least one memory cell selected for at least one of a read operation or verify operation to facilitate reducing at least one of adjacent wordline disturb, a shift in voltage threshold level associated with a data state of the at least one selected memory cell in the memory, or a shift in a drain-source current threshold level associated with a data state of the at least one selected memory cell in the memory; and means for providing a respective predefined gate voltage, predefined drain voltage, and predefined source voltage to the at least one selected memory cell to facilitate performing the at least one of a read operation or a verify operation to facilitate reading or verifying data stored in the at least one selected memory cell based at least in part on a received read command or verify command. |
| Claim: |
20. The system of claim 19, further comprising: means for evaluating at least one of an amount of adjacent wordline disturb, an amount of shift in a threshold voltage level associated with the at least one selected memory cell, or an amount of shift in a drain-source current level associated with the at least one selected memory cell; and means for modifying the predefined negative gate voltage applied to wordlines adjacent to at least one selected wordline associated with at least one memory cell selected for at least one of a read operation or verify operation to facilitate reducing at least one of adjacent wordline disturb, a shift in voltage threshold level associated with a data state of the at least one selected memory cell in the memory, or a shift in a drain-source current threshold level associated with a data state of the at least one selected memory cell in the memory. |
| Current U.S. Class: |
36518/502 |
| Current International Class: |
11 |
| Accession Number: |
edspap.20100128521 |
| Database: |
USPTO Patent Applications |
