Wiring board manufacturing method

Bibliographic Details
Title: Wiring board manufacturing method
Document Number: 20080142256
Publication Date: June 19, 2008
Appl. No: 12/068992
Application Filed: February 14, 2008
Abstract: The present invention relates to a method of manufacturing a wiring board comprising: a build-up layer, in which wiring patterns are piled with insulating layers; and a core substrate, which is separately formed from the build-up layer, the method comprising the steps of: separably forming the build-up layer on a plate-shaped support; electrically connecting the core substrate to the wiring patterns of the build-up layer on the support; and removing the support from the build-up layer so as to form the wiring board, in which the build-up layer is connected to the core substrate. By separably forming the build-up layer and the core substrate, the wiring board effectively exhibiting characteristics thereof can be produced.
Inventors: Shuto, Takashi (Kawasaki, JP); Takano, Kenji (Kawasaki, JP); Iida, Kenji (Kawasaki, JP); Abe, Kenichiro (Kawasaki, JP); Arai, Keiji (Kawasaki, JP); Seyama, Kiyotaka (Kawasaki, JP)
Assignees: FUJITSU LIMITED (Kawasaki, JP)
Claim: 1. A method of manufacturing a wiring board, comprising: forming a build-up layer on a side of a core substrate of the wiring board, the build-up layer including metal film whose thermal expansion coefficient is lower than that of copper, and the metal film is formed to be located at positions not interfering with wiring patterns formed on the wiring board.
Claim: 2. The method of manufacturing a wiring board according to claim 1, wherein: an adhesive is applied to one side face of the metal film; and the metal film is layered on the build-up layer.
Claim: 3. A method of manufacturing a wiring board, comprising: forming build-up layers on both sides of a core substrate of the wiring board; and forming, on the build-up layer, metal films whose thermal expansion coefficients are lower than that of copper, the metal films are located at the positions not interfering with wiring patterns formed in the build-up layers.
Claim: 4. The method of manufacturing a wiring board according to claim 3, further comprising: forming the other build-up layer on the metal film.
Claim: 5. A wiring board comprising: a core substrate; and a build-up layer formed on the core substrate; wherein the build-up layer comprising a metal film whose thermal expansion coefficient is lower than that of copper, the metal film is located at a position of the wiring board not interfering with wiring patterns formed on the wiring board.
Current U.S. Class: 174/262
Current International Class: 05; 05
Accession Number: edspap.20080142256
Database: USPTO Patent Applications
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Language:English