A 5-nm 254-TOPS/W 221-TOPS/mm2 Fully-Digital Computing-in-Memory Macro Supporting Wide-Range Dynamic-Voltage-Frequency Scaling and Simultaneous MAC and Write Operations

Bibliographic Details
Title: A 5-nm 254-TOPS/W 221-TOPS/mm2 Fully-Digital Computing-in-Memory Macro Supporting Wide-Range Dynamic-Voltage-Frequency Scaling and Simultaneous MAC and Write Operations
Authors: Fujiwara, Hidehiro, Mori, Haruki, Zhao, Wei-Chang, Chuang, Mei-Chen, Naous, Rawan, Chuang, Chao-Kai, Hashizume, Takeshi, Sun, Dar, Lee, Chia-Fu, Akarvardar, Kerem, Adham, Saman, Chou, Tan-Li, Sinangil, Mahmut Ersin, Wang, Yih, Chih, Yu-Der, Chen, Yen-Huei, Liao, Hung-Jen, Chang, Tsung-Yung Jonathan
Source: 2022 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2022 IEEE International. 65:1-3 Feb, 2022
Relation: 2022 IEEE International Solid-State Circuits Conference (ISSCC)
Database: IEEE Xplore Digital Library