Bibliographic Details
Title: |
32.6 A K-Band 12.1-to-16.6GHz Subsampling ADPLL with 47.3fsrms Jitter Based on a Stochastic Flash TDC and Coupled Dual-Core DCO in 16nm FinFET CMOS |
Authors: |
Thaller, Edwin, Levinger, Run, Shumaker, Evgeny, Farber, Aryeh, Bershansky, Sergey, Geron, Nir, Ravi, Ashoke, Banin, Rotem, Kadry, Jasmin, Horovitz, Gil, Krassnitzer, Christian, Duller, Christoph, Torta, Patrick, Elzinga, Mark, Azadet, Kamran |
Source: |
2021 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2021 IEEE International. 64:451-453 Feb, 2021 |
Relation: |
2021 IEEE International Solid-State Circuits Conference (ISSCC) |
Database: |
IEEE Xplore Digital Library |