Design and Analysis of Low-Power 16-bit Parallel-Prefix Adiabatic Adders

Bibliographic Details
Title: Design and Analysis of Low-Power 16-bit Parallel-Prefix Adiabatic Adders
Authors: Nazare, Nagesh N., Nayana, R. J., Bhat, Pradeep S., Premananda, B.S.
Source: 2018 3rd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT) Recent Trends in Electronics, Information & Communication Technology (RTEICT), 2018 3rd IEEE International Conference on. :524-529 May, 2018
Relation: 2018 3rd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)
Database: IEEE Xplore Digital Library