A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing

Bibliographic Details
Title: A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing
Authors: Nebashi, Ryusuke, Sakimura, Noboru, Honjo, Hiroaki, Morioka, Ayuka, Tsuji, Yukihide, Ishihara, Kunihiko, Tokutome, Keiichi, Miura, Sadahiko, Fukami, Shunsuke, Kinoshita, Keizo, Hanyu, Takahiro, Endoh, Tetsuo, Kasai, Naoki, Ohno, Hideo, Sugibayashi, Tadahiko
Source: 2014 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2014 IEEE International Symposium on. :1588-1591 Jun, 2014
Relation: 2014 IEEE International Symposium on Circuits and Systems (ISCAS)
Database: IEEE Xplore Digital Library