Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme
| Title: | Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme |
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| Authors: | Chang, M.-F., Kuo, C.-C., Sheu, S.-S., Lin, C.-J., King, Y.-C., Chen, F. T., Ku, T.-K., Tsai, M.-J., Wu, J.-J., Chih, Y.-D. |
| Source: | IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 49(4):908-916 Apr, 2014 |
| Database: | IEEE Xplore Digital Library |
| ISSN: | 00189200 1558173X |
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| DOI: | 10.1109/JSSC.2013.2297417 |
| Published in: | IEEE Journal of Solid-State Circuits, Solid-State Circuits, IEEE Journal of, IEEE J. Solid-State Circuits |