Bibliographic Details
Title: |
High performance bulk planar 20nm CMOS technology for low power mobile applications |
Authors: |
Shang, Huiling, Jain, S., Josse, E., Alptekin, E., Nam, M.H., Kim, S.W., Cho, K.H., Kim, I., Liu, Y., Yang, X., Wu, X., Ciavatti, J., Kim, N.S., Vega, R., Kang, L., Meer, H.V., Samavedam, S., Celik, M., Soss, S., Utomo, H., Ramachandran, R., Lai, W., Sardesai, V., Tran, C., Kim, J.Y., Park, Y.H., Tan, W.L., Shimizu, T., Joy, R., Strane, J., Tabakman, K., Lalanne, F., Montanini, P., Babich, K., Kim, J. B., Economikos, L., Cote, W., Reddy, C., Belyansky, M., Arndt, R., Kwon, U., Wong, K., Koli, D., Levedakis, D., Lee, J.W., Muncy, J., Krishnan, S., Schepis, D., Chen, X., Kim, B.D., Tian, C., Linder, B.P., Cartier, E., Narayanan, V., Northrop, G., Menut, O., Meiring, J., Thomas, A., Aminpur, M., Park, S.H., Lee, K.Y., Kim, B.Y., Rhee, S.H., Hamieh, B., Srivastava, R., Koshy, R., Goldberg, C., Pallachalil, M., Chae, M., Ogino, A., Watanabe, T., Oh, M., Mallela, H., Codi, D., Malinge, P., Weybright, M., Mann, R., Mittal, A., Eller, M., Lian, S., Li, Y., Divakaruni, R., Bukofsky, S., Kim, J.D., Sudijono, J., Neumueller, W., Matsuoka, F., Sampson, R. |
Source: |
2012 Symposium on VLSI Technology (VLSIT) VLSI Technology (VLSIT), 2012 Symposium on. :129-130 Jun, 2012 |
Relation: |
2012 IEEE Symposium on VLSI Technology |
Database: |
IEEE Xplore Digital Library |