A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time
| Title: | A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time |
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| Authors: | Chang, Meng-Fan, Wu, Che-Wei, Kuo, Chia-Cheng, Shen, Shin-Jang, Lin, Ku-Feng, Yang, Shu-Meng, King, Ya-Chin, Lin, Chorng-Jung, Chih, Yu-Der |
| Source: | 2012 IEEE International Solid-State Circuits Conference Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International. :434-436 Feb, 2012 |
| Relation: | 2012 IEEE International Solid- State Circuits Conference - (ISSCC) |
| Database: | IEEE Xplore Digital Library |
| ISBN: | 9781467303767 9781467303743 9781467303750 9781467303774 |
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| ISSN: | 01936530 23768606 |
| DOI: | 10.1109/ISSCC.2012.6177079 |
| Published in: | 2012 IEEE International Solid-State Circuits Conference, Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International |