Device and Circuit Co-Design Robustness Studies in the Subthreshold Logic for Ultralow-Power Applications for 32 nm CMOS
| Title: | Device and Circuit Co-Design Robustness Studies in the Subthreshold Logic for Ultralow-Power Applications for 32 nm CMOS |
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| Authors: | Vaddi, R., Dasgupta, S., Agarwal, R. P. |
| Source: | IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 57(3):654-664 Mar, 2010 |
| Database: | IEEE Xplore Digital Library |
| ISSN: | 00189383 15579646 |
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| DOI: | 10.1109/TED.2009.2039529 |
| Published in: | IEEE Transactions on Electron Devices, Electron Devices, IEEE Transactions on, IEEE Trans. Electron Devices |