Impact of tantalum composition in TaC/HfSiON gate stack on device performance of aggressively scaled CMOS devices with SMT and strained CESL
| Title: | Impact of tantalum composition in TaC/HfSiON gate stack on device performance of aggressively scaled CMOS devices with SMT and strained CESL |
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| Authors: | Goto, M., Tatsumura, K., Kawanaka, S., Nakajima, K., Ichihara, R., Yoshimizu, Y., Onoda, H., Nagatomo, K., Sasaki, T., Fukushima, T., Nomachi, A., Inumiya, S., Oguma, H., Miyashita, K., Harakawa, H., Inaba, S., Ishida, T., Azuma, A., Aoyama, T., Koyama, M., Eguchi, K., Toyoshima, Y. |
| Source: | 2008 Symposium on VLSI Technology VLSI Technology, 2008 Symposium on. :132-133 Jun, 2008 |
| Relation: | 2008 Symposium on VLSI Technology |
| Database: | IEEE Xplore Digital Library |
| ISBN: | 9781424418022 9781424418039 |
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| ISSN: | 07431562 21589682 |
| DOI: | 10.1109/VLSIT.2008.4588591 |
| Published in: | 2008 Symposium on VLSI Technology, VLSI Technology, 2008 Symposium on |