An efficient architecture of bitplane coding in VC-1 for real-time video processing
| Title: | An efficient architecture of bitplane coding in VC-1 for real-time video processing |
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| Authors: | Lim, Y.-H., Jun, S.-S., Kang, J.-S. |
| Source: | 2007 IEEE International Symposium on Signal Processing and Information Technology Signal Processing and Information Technology, 2007 IEEE International Symposium on. :1198-1203 Dec, 2007 |
| Relation: | 2007 IEEE International Symposium on Signal Processing and Information Technology |
| Database: | IEEE Xplore Digital Library |
| ISBN: | 9781424418343 9781424418350 |
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| ISSN: | 21627843 |
| DOI: | 10.1109/ISSPIT.2007.4458061 |
| Published in: | 2007 IEEE International Symposium on Signal Processing and Information Technology, Signal Processing and Information Technology, 2007 IEEE International Symposium on |