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Test circuits for extracting sub-100nm MOSFET technology variations with the MOSFET model HiSIM

Bibliographic Details
Title: Test circuits for extracting sub-100nm MOSFET technology variations with the MOSFET model HiSIM
Authors: Miura-Mattausch, A., Matsumoto, S., Mizoguchi, K., Miyawaki, D., Mattausch, F.J., Itoh, S., Morikawa, K.
Source: Proceedings of the 2004 International Conference on Microelectronic Test Structures (IEEE Cat. No.04CH37516) Microelectronic test structures Microelectronic Test Structures, 2004. Proceedings. ICMTS '04. The International Conference on. :267-272 2004
Relation: Proceedings of the 2004 International Conference on Microelectronic Test Structures
Database: IEEE Xplore Digital Library
More Details
ISBN:0780382625
9780780382626
DOI:10.1109/ICMTS.2004.1309493
Published in:Proceedings of the 2004 International Conference on Microelectronic Test Structures (IEEE Cat. No.04CH37516), Microelectronic Test Structures, 2004. Proceedings. ICMTS '04. The International Conference on, Microelectronic test structures