Gate-stack Optimization to Mitigate the Cylindrical Effect in Ferroelectric VNAND

Bibliographic Details
Title: Gate-stack Optimization to Mitigate the Cylindrical Effect in Ferroelectric VNAND
Authors: Kim, Kwangsoo, Lim, Suhwan, Woo, Jongho, Lim, Junyeong, Yoo, Sijung, Kim, Hyoseok, Park, Jaewoo, Jun, Haeyeon, Kim, Seunghyun, Woo, Myunghun, Kim, Taeyoung, Park, Sanghyun, Ko, Hanseung, Noh, Youngji, Choi, Moonkang, Baek, Jongyeon, Kim, Jisung, Lee, Kiheun, Park, Sam, Choe, Dukhyun, Jung, Moonyoung, Yon, Gukhyon, Lee, Suhyeong, Kim, Hyung Joon, Kim, Kijoon, Hong, Sungduk, Park, Kwangmin, Kuh, Bong Jin, Kim, Wanki, Ha, Daewon, Ahn, Sujin, Song, Jaihyuk
Source: 2024 IEEE International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2024 IEEE International. :1-4 Dec, 2024
Relation: 2024 IEEE International Electron Devices Meeting (IEDM)
Database: IEEE Xplore Digital Library