Bibliographic Details
| Title: |
Design of the Self-Biased PLL Based Low-Power Low-Jitter Multi-Phase Clock Generator: An Overview (Invited Paper) |
| Authors: |
Gao, Meiyi, Wei, Zhongming, Zhan, Yongzheng, Zhang, Zhao |
| Source: |
2024 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) Radio-Frequency Integration Technology (RFIT), 2024 IEEE International Symposium on. :1-3 Aug, 2024 |
| Relation: |
2024 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) |
| Database: |
IEEE Xplore Digital Library |
