A Highly-Scalable Deep-Learning Accelerator With a Cost-Effective Chip-to-Chip Adapter and a C2C-Communication-Aware Scheduler
| Title: | A Highly-Scalable Deep-Learning Accelerator With a Cost-Effective Chip-to-Chip Adapter and a C2C-Communication-Aware Scheduler |
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| Authors: | Kim, J., Park, C., Hyun, E., Nguyen, X.T., Lee, H. |
| Source: | IEEE Journal on Emerging and Selected Topics in Circuits and Systems IEEE J. Emerg. Sel. Topics Circuits Syst. Emerging and Selected Topics in Circuits and Systems, IEEE Journal on. 14(3):455-468 Sep, 2024 |
| Database: | IEEE Xplore Digital Library |
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