Groebner Bases Based Verification Solution for SystemVerilog Concurrent Assertions

Bibliographic Details
Title: Groebner Bases Based Verification Solution for SystemVerilog Concurrent Assertions
Authors: Ning Zhou, Xinyan Gao, Jinzhao Wu, Jianchao Wei, Dakui Li
Source: Journal of Applied Mathematics, Vol 2014 (2014)
Publisher Information: Hindawi Limited, 2014.
Publication Year: 2014
Collection: LCC:Mathematics
Subject Terms: Mathematics, QA1-939
More Details: We introduce an approach exploiting the power of polynomial ring algebra to perform SystemVerilog assertion verification over digital circuit systems. This method is based on Groebner bases theory and sequential properties checking. We define a constrained subset of SVAs so that an efficient polynomial modeling mechanism for both circuit descriptions and assertions can be applied. We present an algorithm framework based on the algebraic representations using Groebner bases for concurrent SVAs checking. Case studies show that computer algebra can provide canonical symbolic representations for both assertions and circuit designs and can act as a novel solver engine from the viewpoint of symbolic computation.
Document Type: article
File Description: electronic resource
Language: English
ISSN: 1110-757X
1687-0042
Relation: https://doaj.org/toc/1110-757X; https://doaj.org/toc/1687-0042
DOI: 10.1155/2014/194574
Access URL: https://doaj.org/article/f836846f7ced4a38b3f4c8b40715cfa3
Accession Number: edsdoj.f836846f7ced4a38b3f4c8b40715cfa3
Database: Directory of Open Access Journals
More Details
ISSN:1110757X
16870042
DOI:10.1155/2014/194574
Published in:Journal of Applied Mathematics
Language:English