Power Optimized Design Framework for FPGA Clusters.
| Title: | Power Optimized Design Framework for FPGA Clusters. |
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| Authors: | KENSUKE IIZUKA1, fic@am.ics.keio.ac.jp, KOHEI ITO1, RYOTA YASUDO2, HIDEHARU AMANO1 |
| Source: | IPSJ Transactions on System LSI Design Methodology; Feb2024, Vol. 17 Issue 1, p77-86, 10p |
| Database: | Applied Science & Technology Source |
| ISSN: | 18826687 |
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| DOI: | 10.2197/ipsjtsldm.17.77 |
| Published in: | IPSJ Transactions on System LSI Design Methodology |
| Language: | English |