Self-Designing Software.

Authors: Porter, Barry¹, b.f.porter@lancaster.ac.uk, Faulkner Rainford, Penn², penn.rainford@york.ac.uk, Rodrigues-Filho, Roberto³, roberto.filho@ufsc.br

Source: Communications of the ACM; Jan2025, Vol. 68 Issue 1, p50-59, 10p

mCaptcha: Replacing Captchas with Rate limiters to Improve Security and Accessibility.

Authors: Manivannan, Aravinth¹ (AUTHOR) realaravinth@batsense.net, Sethuraman, Sibi Chakkaravarthy² (AUTHOR) sb.sibi@gmail.com, Vimala Sudhakaran, Devi Priya¹ (AUTHOR) vsdevipriya@gmail.com

Source: Communications of the ACM. Oct2024, Vol. 67 Issue 10, p70-80. 11p.

Subject Terms: *Data security, CAPTCHA (Challenge-response test), Cache memory, Denial of service attacks, Computer crime prevention, User-centered system design, Privacy

Edge Caching Placement Strategy based on Evolutionary Game for Conversational Information Seeking in Edge Cloud Computing.

Authors: Shi, Hongjian¹, shhjwu5@sjtu.edu.cn, Zhang, Meng¹, meng-meng@sjtu.edu.cn, Ma, Ruhui¹, ruhuima@sjtu.edu.cn, Lin, Liwei², llw02@fjut.edu.cn, Zhang, Rui¹, zhangruisg111@sjtu.edu.cn, Guan, Haibing¹, hbguan@sjtu.edu.cn

Source: ACM Transactions on the Web; Nov2024, Vol. 18 Issue 4, p1-23, 23p

High Performance and Predictable Shared Last-level Cache for Safety-Critical Systems.

Authors: Wu, Zhuanhao¹, z284wu@uwaterloo.ca, Kaushik, Anirudh², anirudh.kaushik@intel.com, Patel, Hiren³, hiren.patel@uwaterloo.ca

Source: ACM Transactions on Embedded Computing Systems; Nov2024, Vol. 23 Issue 6, p1-30, 30p

Hercules: Enabling Atomic Durability for Persistent Memory with Transient Persistence Domain.

Authors: Ye, Chongnan¹, yechn@shanghaitech.edu.cn, Chen, Meng¹, chenmeng@shanghaitech.edu.cn, Jiang, Qisheng¹, jiangqsh@shanghaitech.edu.cn, Wang, Chundong¹, cd_wang@outlook.com

Source: ACM Transactions on Embedded Computing Systems; Nov2024, Vol. 23 Issue 6, p1-34, 34p

Methodology to Define a Static Allocation Mapping based on Memory Access Patterns and the Signature of MPI Applications in HPC Systems.

Authors: Enrique, Gerard¹, gerard.enrique@eug.es, Bruballa, Eva¹, eva.bruballa@eug.es, Suppi, Remo², remo.suppi@uab.cat, Wong, Alvaro², alvaro.wong@uab.cat, Luque, Emilio², emilio.luque@uab.cat, Rexachs, Dolores², dolores.rexachs@uab.cat

Source: Journal of Computer Science & Technology (JCS&T); Oct2024, Vol. 24 Issue 2, p120-129, 10p

Cheaper Snapdragon X Plus chip aims for long-lasting $700 laptops.

Authors: HACHMAN, MARK (AUTHOR)

Source: PCWorld. Oct2024, Vol. 42 Issue 10, p28-32. 5p. 6 Color Photographs, 2 Charts.

Subject Terms: *Computer systems, *Chief executive officers, Cache memory, Snapdragons, Press conferences, Microsoft Surface

Implementing HR Management System with an AI Powered ChatBot

Authors: Susitra, D, G, Pratheesh, JD, Karthiga, Dhanalakshmi, K, Ahamed, B Shamreen, J, Sylvia Grace

Source: 2025 3rd International Conference on Intelligent Data Communication Technologies and Internet of Things (IDCIoT) Intelligent Da Communication Technologies and Internet of Things (IDCIoT), 2025 3rd International Conference on. :2166-2172 Feb, 2025

Relation: 2025 3rd International Conference on Intelligent Data Communication Technologies and Internet of Things (IDCIoT)

Expanding the PDE Cache by Exploiting Underutilized TLB Entries for Data-Intensive Workloads

Authors: Kim, Hyeong Jin, Kim, Woo Hyun, Han, Tae Hee

Source: 2025 International Conference on Electronics, Information, and Communication (ICEIC) Electronics, Information, and Communication (ICEIC), 2025 International Conference on. :1-4 Jan, 2025

Relation: 2025 International Conference on Electronics, Information, and Communication (ICEIC)

LPCE-Based Replacement Scheme for Enhancing Caching Performance in Named Data Networking.

Authors: Nassane, Samir^1,2,3, samir.nassane@univ-tiaret.dz, Mokhtar Mostefaoui, Sid Ahmed^4,5,6, mokhtar.mostefaoui@univ-tiaret.dz, Mebarek, Bendaoud^7,8,9, bendaoud.mebarek@univ-tiaret.dz, Alem, Abdelkader^10,11, abdelkader83.alem@univ-tiaret.dz

Source: International Journal of Interactive Mobile Technologies; 2024, Vol. 18 Issue 16, p119-141, 23p

A Memory-Disaggregated Radix Tree.

Authors: Luo, Xuchuan¹, xcluo23@m.fudan.edu.cn, Zuo, Pengfei², pfzuo.cs@gmail.com, Shen, Jiacheng³, jcshen@cse.cuhk.edu.hk, Gu, Jiazhen³, jiazhengu@cuhk.edu.hk, Wang, Xin⁴, xinw@fudan.edu.cn, Lyu, Michael³, lyu@cse.cuhk.edu.hk, Zhou, Yangfan⁴, zyf@fudan.edu.cn

Source: ACM Transactions on Storage; Aug2024, Vol. 20 Issue 3, p1-41, 41p

Mixed Micro/Macro Cache for Device-to-Device Caching Systems in Multi-Operator Environments.

Authors: Rim, Minjoong¹ (AUTHOR) minjoong@dongguk.edu

Source: Sensors (14248220). Jul2024, Vol. 24 Issue 14, p4518. 24p.

Subject Terms: *CACHE memory, *POPULARITY

Thermal optimization of two-terminal SOT-MRAM.

Authors: Su, Haotian¹, Kwon, Heungdong², Hwang, William¹, Xue, Fen¹, Köroğlu, Çağıl¹, Tsai, Wilman³, Asheghi, Mehdi², Goodson, Kenneth E.^2,3, Wang, Shan X.^1,3, Pop, Eric^1,3,4,5, epop@stanford.edu

Source: Journal of Applied Physics; 7/7/2024, Vol. 136 Issue 1, p1-10, 10p

Genetic Cache: A Machine Learning Approach to Designing DRAM Cache Controllers in HBM Systems.

Authors: Amouzegar, Morteza¹, amozegar@email.kntu.ac.ir, Rezaalipour, Morteza², morteza.rezaalipour@usi.ch, Dehyadegari, Masoud¹, dehyadegari@kntu.ac.ir

Source: ACM Journal on Emerging Technologies in Computing Systems; Jul2024, Vol. 20 Issue 3, p1-24, 24p

Lightweight Hardware-Based Cache Side-Channel Attack Detection for Edge Devices (Edge-CaSCADe).

Authors: Bhade, Pavitra¹, pavitra19231101@iitgoa.ac.in, Paturel, Joseph², joseph.paturel@inria.fr, Sentieys, Olivier², olivier.sentieys@inria.fr, Sinha, Sharad¹, sharad@iitgoa.ac.in

Source: ACM Transactions on Embedded Computing Systems; Jul2024, Vol. 23 Issue 4, p1-27, 27p

English teaching evaluation based on reinforcement learning in content centric data center network.

Authors: Guo, Hongyu^1,2, Jiang, Xiaoyan^3,4, xiaoyan_jiang@aliyun.com

Source: Wireless Networks (10220038); Jul2024, Vol. 30 Issue 5, p4145-4155, 11p

Random caching design for multi-tier IoT networks with cross-tier base station cooperation.

Authors: Feng, Tianming¹, Shi, Shuo^1,2,3, crcss@hit.edu.cn, Zhang, Shuo¹, Gu, Xuemai^1,2,3, Xu, Zhenyu⁴

Source: Wireless Networks (10220038); Jul2024, Vol. 30 Issue 5, p3973-3988, 16p

Experiences in deploying in-network data caches.

Authors: Sim, Alex¹ asim@lbl.gov, Kissel, Ezra² kissel@es.net, Hazen, Damian² dhazen@es.net, Guok, Chin² chin@es.net

Source: EPJ Web of Conferences. 5/6/2024, Vol. 295, p1-8. 8p.

Subject Terms: *CACHE memory, *TRAFFIC engineering, *ACCESS to information, *DECISION making, *CONTENT delivery networks

Quota management in dCache or making a perfectly normal file system normal.

Authors: Litvintsev, Dmitry¹ litvinse@fnal.gov, Krishnaveni, Chitrapu², Meyer, Svenja³, Millar, Paul³, Mkrtchyan, Tigran¹, Morschel, Lea³, Rossi, Albert¹, Sahakyan, Marina³

Source: EPJ Web of Conferences. 5/6/2024, Vol. 295, p1-5. 5p.

Subject Terms: *CACHE memory, *BACK up systems, *DATA warehousing, *MULTIUSER channels, *DATA analysis

dCache integration with CERN Tape Archive.

Authors: Mkrtchyan, Tigran¹ tigran.mkrtchyan@desy.de, Chodak, Jacek¹, Karimi, Mwai¹, Lueken, Ralf¹, Meyer, Svenja¹, Suchowski, Peter¹, Voss, Christian¹

Source: EPJ Web of Conferences. 5/6/2024, Vol. 295, p1-7. 7p.

Subject Terms: *CACHE memory, *OPEN source software, *DATA management, *BUILDINGS, *COMPUTER interfaces