Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis

Authors: Sarda, Giuseppe M., Shah, Nimish, Bhattacharjee, Debjyoti, Debacker, Peter, Verhelst, Marian

Source: 2023 IEEE International Symposium on Workload Characterization (IISWC)

Subject Terms: Computer Science - Hardware Architecture

Access URL: http://arxiv.org/abs/2407.11999

DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC

Authors: Ueyoshi, Kodai, Papistas, Ioannis A., Houshmand, Pouya, Sarda, Giuseppe M., Jain, Vikram, Shi, Man, Zheng, Qilin, Giraldo, Sebastian, Vrancx, Peter, Doevenspeck, Jonas, Bhattacharjee, Debjyoti, Cosemans, Stefan, Mallik, Arindam, Debacker, Peter, Verkest, Diederik, Verhelst, Marian

Source: 2022 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2022 IEEE International. 65:1-3 Feb, 2022

Relation: 2022 IEEE International Solid-State Circuits Conference (ISSCC)

AIMC Modeling and Parameter Tuning for Layer-Wise Optimal Operating Point in DNN Inference

Authors: Dadras, Iman, Sarda, Giuseppe M., Laubeuf, Nathan, Bhattacharjee, Debjyoti, Mallik, Arindam

Source: IEEE access. 11:87189-87199

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCvdc_100190919469.0x000001&indx=1&recIds=ETOCvdc_100190919469.0x000001

DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge

Authors: Houshmand, Pouya, Sarda, Giuseppe M., Jain, Vikram, Ueyoshi, Kodai, Papistas, Ioannis A., Shi, Man, Zheng, Qilin, Bhattacharjee, Debjyoti, Mallik, Arindam, Debacker, Peter, Verkest, Diederik, Verhelst, Marian

Source: IEEE journal of solid-state circuits. 58(1):203-215

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCvdc_100169967718.0x000001&indx=1&recIds=ETOCvdc_100169967718.0x000001

DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC
IEEE International solid-state circuits conference, ISSCC

Authors: Sarda, Giuseppe M.

Source: Digest of technical papers. 2022(1):15.6-15.6

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCCN607521061&indx=1&recIds=ETOCCN607521061

DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge

Authors: Houshmand, Pouya, Sarda, Giuseppe M., Jain, Vikram, Ueyoshi, Kodai, Papistas, Ioannis A., Shi, Man, Zheng, Qilin, Bhattacharjee, Debjyoti, Mallik, Arindam, Debacker, Peter, Verkest, Diederik, Verhelst, Marian

Source: IEEE Journal of Solid-State Circuits; January 2023, Vol. 58 Issue: 1 p203-215, 13p