Design and FPGA implementation of a 100 Gbit/s optical transport network processor

Authors: Bernardo, Rodrigo, Salvador, Arley H., Mobilon, Eduardo, Monte, Luis R., Boisclair, Stephane, Warshawsky, Avrum

Source: 2013 23rd International Conference on Field programmable Logic and Applications Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on. :1-4 Sep, 2013

Relation: 2013 23rd International Conference on Field Programmable Logic and Applications (FPL)

Architecture and FPGA implementation of a 10.7 Gbit/s OTN Regenerator for optical communication systems

Authors: Bernardo, Rodrigo, Monte, Luis R., Mobilon, Eduardo, Corso, Valentino, Salvador, Arley H., Neves, Carolina G., Nakandakare, Cleber A., da Silva, Daniele R., de Barros, Luis P. F., da Silva, Ronaldo F.

Source: 22nd International Conference on Field Programmable Logic and Applications (FPL) Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on. :277-283 Aug, 2012

Relation: 2012 22nd International Conference on Field Programmable Logic and Applications (FPL)