TEACH: Outlier Oriented Testing of Analog/Mixed-Signal Circuits Using One-class Hyperdimensional Clustering

Authors: Komarraju, Suhasini, Mejri, Mohamed, Chatterjee, Abhijit, Natarajan, Suriyaprakash, Goteti, Prashant

Source: 2024 IEEE International Test Conference (ITC) ITC Test Conference (ITC), 2024 IEEE International. :426-435 Nov, 2024

Relation: 2024 IEEE International Test Conference (ITC)

Effectiveness of Timing-Aware Scan Tests in Targeting Marginal Failures and Silent Data Errors in a Data Center Processor

Authors: Natarajan, Suriyaprakash, Oak, Chaitali S., Kakollu, Vijay, Chaplot, Nipun, Roy, Soham, Lonkar, Apurva, Reyes, Gerardo J. Perfecto

Source: 2024 IEEE International Test Conference (ITC) ITC Test Conference (ITC), 2024 IEEE International. :253-260 Nov, 2024

Relation: 2024 IEEE International Test Conference (ITC)

Generating Storage-Aware Test Sets Targeting Several Fault Models

Authors: Addepalli, Hari, Pomeranz, Irith, Amyeen, Enamul, Natarajan, Suriyaprakash, Sinha, Arani, Venkataraman, Srikanth

Source: 2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ISVLSI VLSI (ISVLSI), 2024 IEEE Computer Society Annual Symposium on. :15-20 Jul, 2024

Relation: 2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

Structural Built In Self Test of Analog Circuits using ON/OFF Keying and Delay Monitors

Authors: Kashyap, Suhas Krishna, Raghavendra, Chinmaye, Natarajan, Suriyaprakash, Ozev, Sule

Source: 2024 IEEE 42nd VLSI Test Symposium (VTS) VLSI Test Symposium (VTS), 2024 IEEE 42nd. :1-7 Apr, 2024

Relation: 2024 IEEE 42nd VLSI Test Symposium (VTS)

Enhancing Functional Safety in Automotive AMS Circuits through Unsupervised Machine Learning

Authors: Arunachalam, Ayush, Kintz, Ian, Banerjee, Suvadeep, Raha, Arnab, Jin, Xiankun, Su, Fei, Prasanth, Viswanathan Pillai, Parekhji, Rubin A., Natarajan, Suriyaprakash, Basu, Kanad

Subject Terms: Computer Science - Machine Learning, Electrical Engineering and Systems Science - Systems and Control

Access URL: http://arxiv.org/abs/2404.01632

Using Fault Detection Tests to Produce Diagnostic Tests Targeting Large Sets of Candidate Faults

Authors: Addepalli, Hari, Pomeranz, Irith, Amyeen, Enamul, Natarajan, Suriyaprakash, Sinha, Arani, Venkataraman, Srikanth

Source: 2022 IEEE 31st Asian Test Symposium (ATS) ATS Test Symposium (ATS), 2022 IEEE 31st Asian. :120-125 Nov, 2022

Relation: 2022 IEEE 31st Asian Test Symposium (ATS)

DEFCON: Defect Acceleration through Content Optimization

Authors: Natarajan, Suriyaprakash, Sathaye, Abhijit, Oak, Chaitali, Chaplot, Nipun, Banerjee, Suvadeep

Source: 2022 IEEE International Test Conference (ITC) ITC Test Conference (ITC), 2022 IEEE International. :298-304 Sep, 2022

Relation: 2022 IEEE International Test Conference (ITC)

Two Pattern Timing Tests Capturing Defect-Induced Multi-Gate Delay Impact of Shorts

Authors: Pandey, Sujay, Liao, Zhiwei, Nandi, Shreyas, Natarajan, Suriyaprakash, Sinha, Arani, Singh, Adit, Chatterjee, Abhijit

Source: 2021 IEEE 39th VLSI Test Symposium (VTS) Test Symposium (VTS), 2021 IEEE 39th VLSI. :1-7 Apr, 2021

Relation: 2021 IEEE 39th VLSI Test Symposium (VTS)

HardCompress: A Novel Hardware-based Low-power Compression Scheme for DNN Accelerators

Authors: Arunachalam, Ayush, Kundu, Shamik, Raha, Arnab, Banerjee, Suvadeep, Natarajan, Suriyaprakash, Basu, Kanad

Source: 2021 22nd International Symposium on Quality Electronic Design (ISQED) Quality Electronic Design (ISQED), 2021 22nd International Symposium on. :457-462 Apr, 2021

Relation: 2021 22nd International Symposium on Quality Electronic Design (ISQED)

SAT-ATPG Generated Multi-Pattern Scan Tests for Cell Internal Defects: Coverage Analysis for Resistive Opens and Shorts

Authors: Pandey, Sujay, Liao, Zhiwei, Nandi, Shreyas, Gupta, Sanya, Natarajan, Suriyaprakash, Sinha, Arani, Singh, Adit, Chatterjee, Abhijit

Source: 2020 IEEE International Test Conference (ITC) Test Conference (ITC), 2020 IEEE International. :1-10 Nov, 2020

Relation: 2020 IEEE International Test Conference (ITC)

Automating Design For Yield: Silicon Learning to Predictive Models and Design Optimization

Authors: Raman, Srikanth Venkat, Limpisathian, Pongpachara, Meinerzhagen, Pascal, Natarajan, Suriyaprakash, Yang, Eric

Source: 2020 IEEE International Test Conference (ITC) Test Conference (ITC), 2020 IEEE International. :1-10 Nov, 2020

Relation: 2020 IEEE International Test Conference (ITC)

Automated Design For Yield Through Defect Tolerance

Authors: Natarajan, Suriyaprakash, Malavasi, Andres F., Meinerzhagen, Pascal A.

Source: 2020 IEEE 38th VLSI Test Symposium (VTS) VLSI Test Symposium (VTS), 2020 IEEE 38th. :1-6 Apr, 2020

Relation: 2020 IEEE 38th VLSI Test Symposium (VTS)

Trouble-Shooting at GAN Point: Improving Functional Safety in Deep Learning Accelerators

Authors: Kundu, Shamik, Banerjee, Suvadeep, Raha, Arnab, Su, Fei, Natarajan, Suriyaprakash, Basu, Kanad

Source: IEEE transactions on computers. 72(8):2194-2208

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCvdc_100187598498.0x000001&indx=1&recIds=ETOCvdc_100187598498.0x000001

Fault simulation for analog test coverage

Authors: Sequeira, Jyotsna, Natarajan, Suriyaprakash, Goteti, Prashant, Chaudhary, Nitin

Source: 2016 IEEE International Test Conference (ITC) Test Conference (ITC), 2016 IEEE International. :1-7 Nov, 2016

Relation: 2016 IEEE International Test Conference (ITC)

Infant mortality tests for analog and mixed-signal circuits

Authors: Banerjee, Suvadeep, Natarajan, Suriyaprakash

Source: 2016 IEEE 34th VLSI Test Symposium (VTS) VLSI Test Symposium (VTS), 2016 IEEE 34th. :1-6 Apr, 2016

Relation: 2016 IEEE 34th VLSI Test Symposium (VTS)

Every test makes a difference: Compressing analog tests to decrease production costs

Authors: Ahmadyan, Seyed Nematollah, Natarajan, Suriyaprakash, Vasudevan, Shobha

Source: 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC) Design Automation Conference (ASP-DAC), 2016 21st Asia and South Pacific. :539-544 Jan, 2016

Relation: 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC)

Identifying DC bias conditions for maximum DC current in digitally-assisted analog design

Authors: Li, Chong, Natarajan, Suriyaprakash, Shi, C.J. Richard

Source: 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on. :478-481 Dec, 2015

Relation: 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)

A Model Study of Defects and Faults in Embedded Spin Transfer Torque (STT) MRAM Arrays

Authors: Chintaluri, Ashwin, Parihar, Abhinav, Natarajan, Suriyaprakash, Naeimi, Helia, Raychowdhury, Arijit

Source: 2015 IEEE 24th Asian Test Symposium (ATS) Test Symposium (ATS), 2015 IEEE 24th Asian. :187-192 Nov, 2015

Relation: 2015 IEEE 24th Asian Test Symposium (ATS)

Fast eye diagram analysis for high-speed CMOS circuits

Authors: Ahmadyan, Seyed Nematollah, Gu, Chenjie, Natarajan, Suriyaprakash, Chiprout, Eli, Vasudevan, Shobha

Source: 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE) Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015. :1377-1382 Mar, 2015

Relation: 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE)

Spatio-temporal wafer-level correlation modeling with progressive sampling: A pathway to HVM yield estimation

Authors: Ahmadi, Ali, Huang, Ke, Natarajan, Suriyaprakash, Carulli, John M., Makris, Yiorgos

Source: 2014 International Test Conference Test Conference (ITC), 2014 IEEE International. :1-10 Oct, 2014

Relation: 2014 IEEE International Test Conference (ITC)