7.6 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chip

Authors: Kim, Hyun-Jin, Lim, Jeong-Don, Lee, Jang-Woo, Na, Dae-Hoon, Shin, Joon-Ho, Kim, Chae-Hoon, Yu, Seung-Woo, Shin, Ji-Yeon, Lee, Seon-Kyoo, Rajagopal, Devraj, Kim, Sang-Tae, Kang, Kyeong-Tae, Park, Jeong-Joon, Kwon, Yong-Jin, Lee, Min-Jae, Kim, Sung-Hoon, Shin, Seung-Hoon, Kim, Hyung-Gon, Kim, Jin-Tae, Kim, Ki-Sung, Joo, Han-Sung, Park, Chan-Jin, Kim, Jae-Hwan, Lee, Man-Joong, Kim, Do-Kook, Yang, Hyang-Ja, Byeon, Dae-Seok, Park, Ki-Tae, Kyung, Kye-hyun, Choi, Jeong-Hyuk

Source: 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers Solid- State Circuits Conference - (ISSCC), 2015 IEEE International. :1-3 Feb, 2015

Relation: 2015 IEEE International Solid- State Circuits Conference - (ISSCC)

Nerual signal recorder with tunable gain amplifier using low transconductance OTA

Authors: Na, Dae Hoon, Kim, Tae Wook

Source: 2010 International SoC Design Conference SoC Design Conference (ISOCC), 2010 International. :43-46 Nov, 2010

Relation: 2010 International SoC Design Conference (ISOCC 2010)

Clock signal processor and non-volatile memory device including the same