Invited Paper: 2023 ICCAD CAD Contest Problem B: 3D Placement with Macros

Authors: Hu, Kai-Shun, Chi, Hao-Yu, Lin, I-Jye, Wu, Yi-Hsuan, Chen, Wei-Hsu, Hsieh, Yi-Ting

Source: 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD) Computer Aided Design (ICCAD), 2023 IEEE/ACM International Conference on. :1-6 Oct, 2023

Relation: 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)

2022 ICCAD CAD Contest Problem B: 3D Placement with D2D Vertical Connections

Authors: Hu, Kai-Shun, Lin, I-Jye, Huang, Yu-Hui, Chi, Hao-Yu, Wu, Yi-Hsuan, Shen, Chin-Fang Cindy

Source: 2022 IEEE/ACM International Conference On Computer Aided Design (ICCAD) Computer Aided Design (ICCAD)2022 IEEE/ACM International Conference On. :1-5 Oct, 2022

Relation: 2022 IEEE/ACM International Conference On Computer Aided Design (ICCAD)

Single layer differential group routing for flip-chip designs

Authors: Lin, I-Jye, Yang, Ming-Jen, Hu, Kai-Shun

Source: 2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) VLSI Design, Automation and Test (VLSI-DAT), 2016 International Symposium on. :1-4 Apr, 2016

Relation: 2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)

Obstacle-avoiding free-assignment routing for flip-chip designs

Authors: Lee, Po-Wei, Lee, Hsu-Chieh, Ho, Yuan-Kai, Chang, Yao-Wen, Chang, Chen-Feng, Lin, I-Jye, Shen, Chin-Fang

Source: DAC Design Automation Conference 2012 Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE. :1088-1093 Jun, 2012

Relation: 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

Routing method for flip chip package and apparatus using the same

A Network-Flow-Based RDL Routing Algorithmz [i.e. Algorithm] for Flip-Chip Design.

Authors: Wang, Jia-Wei, Lin, I-Jye, Chang, Yao-Wen

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; August 2007, Vol. 26 Issue 8, p1417-1429, 13p

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An efficient algorithm for statistical circuit optimization using Lagrangian relaxation.

Authors: Lin, I-Jye, Chang, Yao-Wen

Source: 2007 IEEE/ACM International Conference on Computer-Aided Design; Nov2007, p119-124, 6p

Statistical circuit optimization considering device andinterconnect process variations.

Authors: Lin, I-Jye, Ling, Tsui-Yee, Chang, Yao-Wen

Source: Proceedings of the 2007 International Workshop: System Level Interconnect Prediction; 3/17/2007, p47-54, 8p

A routing algorithm for flip-chip design.

Authors: Fang, Jia-Wei, Lin, I-Jye, Yuh, Ping-Hung, Chang, Yao-Wen, Wang, Jyh-Herng

Source: Proceedings of the 2005 IEEE ACM International Conference Computer-aided Design; 5/31/2005, p753-758, 6p

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