Optimizing with phases: design and application space assessment for networks of phase-locked Ring Oscillators

Authors: Bazzi, A., Hardy, E., Ballester, J., Badets, F., Hutin, L.

Source: 2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS) AI Circuits and Systems (AICAS), 2024 IEEE 6th International Conference on. :602-606 Apr, 2024

Relation: 2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS)

Designing networks of resistively-coupled stochastic Magnetic Tunnel Junctions for energy-based optimum search

Authors: Danouchi, K., Soumah, L., Bouchard, C., Disdier, F., Fassatoui, A., Phan, N.-T., Ezzadeen, M., Delaet, B., Viala, B., Prenat, G., Anghel, L., Talatchian, P., Prejbeanu, I. -L., Andrieu, F., Garello, K., Hutin, L.

Source: 2023 International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2023 International. :1-4 Dec, 2023

Relation: 2023 International Electron Devices Meeting (IEDM)

RF performance of Standard, High-Resistivity and Trap-Rich Silicon substrates down to cryogenic temperature

Authors: Berlingard, Q., Moulin, M., Michel, J.-P., Fache, T., Charlet, I., Plantier, C., Chalupa, Z., Lugo-Alvarez, J., Raskin, J.-P., Hutin, L., Casse, M.

Source: ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (ESSDERC) Solid-State Device Research Conference (ESSDERC), ESSDERC 2023 - IEEE 53rd European. :148-151 Sep, 2023

Relation: ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (ESSDERC)

Field Effect Depletion Regions exploiting different Qox polarities for Interface Passivation in High-Resistivity Silicon Substrates

Authors: Moulin, M., Fache, T., Rack, M., Plantier, C., Lugo, J., Hutin, L., Raskin, J.-P.

Source: 2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT) Technology, Systems and Applications (VLSI-TSA/VLSI-DAT), 2023 International VLSI Symposium on. :1-2 Apr, 2023

Relation: 2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT)

A quantum dot-based frequency multiplier

Authors: Oakes, G. A., Peri, L., Cochrane, L., Martins, F., Hutin, L., Bertrand, B., Vinet, M., Saiz, A. Gomez, Ford, C. J. B., Smith, C. G., Gonzalez-Zalba, M. F.

Subject Terms: Condensed Matter - Mesoscale and Nanoscale Physics, Quantum Physics

Access URL: http://arxiv.org/abs/2211.14127

Ultra-Low-Voltage UTBB-SOI-Based, Pseudo-Static Storage Circuits for Cryogenic CMOS Applications

Authors: Nibhanupudi, S.S.T., Sundara Raman, S.R., Casse, M., Hutin, L., Kulkarni, J.P.

Source: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits IEEE J. Explor. Solid-State Comput. Devices Circuits Exploratory Solid-State Computational Devices and Circuits, IEEE Journal on. 7(2):201-208 Dec, 2021

Toward Monolithically Integrated Hybrid CMOS-NEM Circuits

Authors: Sikder, U., Horace-Herron, K., Yen, T., Usai, G., Hutin, L., Stojanovic, V., Liu, T.K.

Source: IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 68(12):6430-6436 Dec, 2021

Contact-Free MEMS Devices for Reliable and Low-Power Logic Operations

Authors: Perrin, Y., Galisultanov, A., Hutin, L., Basset, P., Fanet, H., Pillonnet, G.

Source: IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 68(6):2938-2943 Jun, 2021

Fast high-fidelity single-shot readout of spins in silicon using a single-electron box

Authors: Oakes, G. A., Ciriano-Tejel, V. N., Wise, D., Fogarty, M. A., Lundberg, T., Lainé, C., Schaal, S., Martins, F., Ibberson, D. J., Hutin, L., Bertrand, B., Stelmashenko, N., Robinson, J. A. W., Ibberson, L., Hashim, A., Siddiqi, I., Lee, A., Vinet, M., Smith, C. G., Morton, J. J. L., Gonzalez-Zalba, M. F.

Subject Terms: Condensed Matter - Mesoscale and Nanoscale Physics, Quantum Physics

Access URL: http://arxiv.org/abs/2203.06608

A single hole spin with enhanced coherence in natural silicon

Authors: Piot, N., Brun, B., Schmitt, V., Zihlmann, S., Michal, V. P., Apra, A., Abadillo-Uriel, J. C., Jehl, X., Bertrand, B., Niebojewski, H., Hutin, L., Vinet, M., Urdampilleta, M., Meunier, T., Niquet, Y. -M., Maurand, R., De Franceschi, S.

Source: Nature Nanotechnology 17, 1072-1077 (2022)

Subject Terms: Condensed Matter - Mesoscale and Nanoscale Physics

Access URL: http://arxiv.org/abs/2201.08637

Importance of stochastic components for Ising Hamiltonian-based invertible logic

Authors: Hutin, L., Talatchian, P., Vaz, P.I., El Valli, A.S., Bazzi, A., Phan, N.-T., Andrieu, F.

Source: 2022 IEEE Silicon Nanoelectronics Workshop (SNW) Silicon Nanoelectronics Workshop (SNW), 2022 IEEE. :1-2 Jun, 2022

Relation: 2022 IEEE Silicon Nanoelectronics Workshop (SNW)

From Silicon CMOS Technology to Spin Qubits

Authors: Hutin, L.

Source: 2019 IEEE 11th International Memory Workshop (IMW) Memory Workshop (IMW), 2019 IEEE 11th International. :1-72 May, 2019

Relation: 2019 IEEE 11th International Memory Workshop (IMW)

Back-End-of-Line Nano-Electro-Mechanical Switches for Reconfigurable Interconnects

Authors: Sikder, U., Usai, G., Yen, T., Horace-Herron, K., Hutin, L., Liu, T.K.

Source: IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 41(4):625-628 Apr, 2020

Valley population of donor states in highly strained silicon

Authors: Voisin, B., Ng, K. S. H., Salfi, J., Usman, M., Wong, J. C., Tankasala, A., Johnson, B. C., McCallum, J. C., Hutin, L., Bertrand, B., Vinet, M., Valanoor, N., Simmons, M. Y., Rahman, R., Hollenberg, L. C. L., Rogge, S.

Subject Terms: Condensed Matter - Mesoscale and Nanoscale Physics

Access URL: http://arxiv.org/abs/2109.08540

Si MOS technology for spin-based quantum computing

Authors: Hutin, L., Bertrand, B., Maurand, R., Crippa, A., Urdampilleta, M., Kim, Y.J., Amisse, A., Bohuslavskyi, H., Bourdet, L., Barraud, S., Jeh, X., Niquet, Y.-M., Sanquer, M., Bauerle, C., Meunier, T., De Franceschi, S., Vinet, M.

Source: 2018 48th European Solid-State Device Research Conference (ESSDERC) Solid-State Device Research Conference (ESSDERC), 2018 48th European. :12-17 Sep, 2018

Relation: ESSDERC 2018 - 48th European Solid-State Device Research Conference (ESSDERC)

Cryogenic Subthreshold Swing Saturation in FD-SOI MOSFETs Described With Band Broadening

Authors: Bohuslavskyi, H., Jansen, A.G.M., Barraud, S., Barral, V., Casse, M., Le Guevel, L., Jehl, X., Hutin, L., Bertrand, B., Billiot, G., Pillonnet, G., Arnaud, F., Galy, P., De Franceschi, S., Vinet, M., Sanquer, M.

Source: IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 40(5):784-787 May, 2019

Spin readout of a CMOS quantum dot by gate reflectometry and spin-dependent tunnelling

Authors: Ciriano-Tejel, V. N., Fogarty, M. A., Schaal, S., Hutin, L., Bertrand, B., Ibberson, Lisa, Gonzalez-Zalba, M. F., Li, J., Niquet, Y. -M., Vinet, M., Morton, J. J. L.

Source: PRX Quantum 2, 010353 (2021)

Subject Terms: Condensed Matter - Mesoscale and Nanoscale Physics, Quantum Physics

Access URL: http://arxiv.org/abs/2005.07764

MOS technology for quantum computing: recent progress and perspectives for scaling up

Authors: Hutin, L., Bertrand, B., Niebojewski, H., Mortemousque, P.-A., Casse, M., Billiot, G., Jehl, X., Maurand, R., Urdampilleta, M., Niquet, Y.-M., De Franceschi, S., Meunier, T., Vinet, M.

Source: 2021 Device Research Conference (DRC) Device Research Conference (DRC), 2021. :1-2 Jun, 2021

Relation: 2021 Device Research Conference (DRC)

Physical and technological challenges towards silicon-based quantum computing

Authors: Apra, A., Ezzouch, R., Bertrand, B., Rambal, N., Catapano, E., Niebojcwski, H., Bedecarrats, T., Hutin, L., Chanrion, E., Urdampilleta, M., Mizokuchi, R., Bassi, M., Piot, N., Vincent, E., Brun-Barrierc, B., Zihlmann, S., Schmitt, V., Dumur, E., Jehl, X., Maurand, R., Vinet, M., Meunier, T., De Franceschi, S.

Source: 2021 Silicon Nanoelectronics Workshop (SNW) Silicon Nanoelectronics Workshop (SNW), 2021. :1-2 Jun, 2021

Relation: 2021 Silicon Nanoelectronics Workshop (SNW)

SOI CMOS technology for quantum information processing

Authors: Hutin, L., Bertrand, B., Maurand, R., Urdampilleta, M., Jadot, B., Bohuslavskyi, H., Bourdet, L., Niquet, Y.-M., Jehl, X., Barraud, S., Bauerle, C., Meunier, T., Sanquer, M., De Franceschi, S., Vinet, M.

Source: 2017 IEEE International Conference on IC Design and Technology (ICICDT) IC Design and Technology (ICICDT), 2017 IEEE International Conference on. :1-4 May, 2017

Relation: 2017 IEEE International Conference on IC Design and Technology (ICICDT)