A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices

Authors: Wu, Ping-Chun, Su, Jian-Wei, Hong, Li-Yang, Ren, Jin-Sheng, Chien, Chih-Han, Chen, Ho-Yu, Ke, Chao-En, Hsiao, Hsu-Ming, Li, Sih-Han, Sheu, Shyh-Shyuan, Lo, Wei-Chung, Chang, Shih-Chieh, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

Source: 2023 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2023 IEEE International. :126-128 Feb, 2023

Relation: 2023 IEEE International Solid-State Circuits Conference (ISSCC)

A 28nm 1Mb Time-Domain Computing-in-Memory 6T-SRAM Macro with a 6.6ns Latency, 1241GOPS and 37.01TOPS/W for 8b-MAC Operations for Edge-AI Devices

Authors: Wu, Ping-Chun, Su, Jian-Wei, Chung, Yen-Lin, Hong, Li-Yang, Ren, Jin-Sheng, Chang, Fu-Chun, Wu, Yuan, Chen, Ho- Yu, Lin, Chen-Hsun, Hsiao, Hsu-Ming, Li, Sih-Han, Sheu, Shyh-Shyuan, Chang, Shih-Chieh, Lo, Wei-Chung, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Wu, Chih-I, Chang, Meng-Fan

Source: 2022 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2022 IEEE International. 65:1-3 Feb, 2022

Relation: 2022 IEEE International Solid-State Circuits Conference (ISSCC)

An 8kb spin-orbit-torque magnetic random-access memory

Authors: Chen, Guan-Long, Wang, I-Jung, Yeh, Po-Shao, Li, Sih-Han, Yang, Shan-Yi, Hsin, Yu-Chen, Wu, Hsin-Tsun, Hsiao, Hsu-Ming, Chang, Yao-Jen, Chen, Kuan-Ming, Rahaman, SK Ziaur, Lee, Hsin-Han, Su, Yi-Hui, Chen, Fang-Ming, Wei, Jeng-Hua, Sheu, Shyh-Shyuan, Wu, Chih-I, Tang, Denny

Source: 2021 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) VLSI Technology, Systems and Applications (VLSI-TSA), 2021 International Symposium on. :1-2 Apr, 2021

Relation: 2021 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)

Hierarchical zeolites comprising orthogonally stacked bundles of zeolite nanosheets for catalytic and adsorption applications

Authors: Chang, Albert, Yang, Tsung-Cheng, Chen, Ming-Yi, Hsiao, Hsu-Ming, Yang, Chia-Min ^*

Source: In Journal of Hazardous Materials 5 December 2020 400

A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips

Authors: Wu, Ping-Chun, Su, Jian-Wei, Hong, Li-Yang, Ren, Jin-Sheng, Chien, Chih-Han, Chen, Ho-Yu, Ke, Chao-En, Hsiao, Hsu-Ming, Li, Sih-Han, Sheu, Shyh-Shyuan, Lo, Wei-Chung, Chang, Shih-Chieh, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

Source: IEEE Journal of Solid-State Circuits; January 2024, Vol. 59 Issue: 1 p196-207, 12p

An 8b-Precision 6T SRAM Computing-in-Memory Macro Using Time-Domain Incremental Accumulation for AI Edge Chips

Authors: Wu, Ping-Chun, Su, Jian-Wei, Chung, Yen-Lin, Hong, Li-Yang, Ren, Jin-Sheng, Chang, Fu-Chun, Wu, Yuan, Chen, Ho-Yu, Lin, Chen-Hsun, Hsiao, Hsu-Ming, Li, Sih-Han, Sheu, Shyh-Shyuan, Chang, Shih-Chieh, Lo, Wei-Chung, Wu, Chih-I, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

Source: IEEE Journal of Solid-State Circuits; 2024, Vol. 59 Issue: 7 p2297-2309, 13p

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