High Performance Transistors Featured in an Aggressively Scaled 45nm Bulk CMOS Technology

Authors: Luo, Z., Rovedo, N., Ong, S., Phoong, B., Eller, M., Utomo, H., Ryou, C., Wang, H., Stierstorfer, R., Clevenger, L., Kim, S., Toomey, J., Sciacca, D., Li, J., Wille, W., Zhao, L., Teo, L., Dyer, T., Fang, S., Yan, J., Kwon, O., Park, D., Holt, J., Han, J., Chan, V., Yuan, J., Kebede, T., Lee, H., Lee, S., Vayshenker, A., Yang, Z., Tian, C., Ng, H., Shang, H., Hierlemann, M., Ku, J., Sudijono, J., Ieong, M.

Source: 2007 IEEE Symposium on VLSI Technology VLSI Technology, 2007 IEEE Symposium on. :16-17 Jun, 2007

Relation: 2007 IEEE Symposium on VLSI Technology

Novel Enhanced Stressor with Graded Embedded SiGe Source/Drain for High Performance CMOS Devices

Authors: Ieong, M., Sudijono, J., Ku, J.H., Shum, D., Hierlemann, M., Amos, R., Chiulli, G., Lindsay, R., Kim, S.D., Loesing, R., Burns, L., Turansky, A., Madan, A., St Lawrence, B., Davis, R., Murphy, R., Li, J., Kim, J.J., Zhuang, H., Mishra, S., Schepis, D., Gutmann, A., Kempisty, J., Adam, T.N., Holt, J., Ng, H., Fang, S., Chong, Y.F., Stierstorfer, R., Krishnasamy, R., Luo, Z., Rovedo, N., Teo, L.W., Utomo, H., Han, J.P.

Source: 2006 International Electron Devices Meeting Electron Devices Meeting, 2006. IEDM '06. International. :1-4 Dec, 2006

Relation: 2006 International Electron Devices Meeting

Stress Proximity Technique for Performance Improvement with Dual Stress Liner at 45nm Technology and Beyond

Authors: Davis, C., Ku, J.H., Schiml, T., Sudijono, J., Yang, I., Steegen, A., Coolbough, D., Hierlemann, M., Ng, H., Amos, R., Sherony, M., Belyansky, M., Widodo, J., Tjoa, T., Edleman, N., Kwon, O., Panda, S., Yuan, J., Nguyen, P., Nivo, N., Luo, Z., Chidambarrao, D., Stierstorfer, R., Kim, J., Park, J., Ajmera, A., Baiocco, C., Ko, Y., Tan, S.S., Teh, Y.W., Dyer, T., Gao, W., Fang, S., Chen, X.

Source: 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers. VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on. :60-61 2006

Relation: 2006 Symposium on VLSI Technology

A 45nm Low Cost Low Power Platform by Using Integrated Dual-Stress-Liner Technology

Authors: Yuan, J., Tan, S., Lee, Y., Kim, J., Lindsay, R., Sardesai, V., Hook, T., Amos, R., Luo, Z., Lee, W., Fang, S., Dyer, T., Rovedo, N., Stierstorfer, R., Yang, Z., Li, J., Barton, K., Ng, H., Sudijono, J., Ku, J., Hierlemann, M., Schiml, T.

Source: 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers. VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on. :100-101 2006

Relation: 2006 Symposium on VLSI Technology

Modeling of MOVPE GaAs Growth Assuming Thermodynamic Equilibrium at The Growth Front: (C/sub 2/H/sub 5/)/sub 2/GaCl and AsH/sub 3/

Authors: Hierlemann, M., Kuech, T.F.

Source: Sixth International Conference Metalorganic Vapor Phase Epitaxy Metalorganic Vapor Phase Epitaxy, 1992. Sixth International Conference. :112-113 1992

Relation: Sixth International Conference Metalorganic Vapor Phase Epitaxy

Strain measurements of ULSI devices using LACBED with TSUPREM modeled displacements
Microscopy of semiconducting materials

Authors: Kenda, A., Cerva, H., Pongratz, P., Hierlemann, M., Liebmann, R.

Source: SPRINGER PROCEEDINGS IN PHYSICS. 107:437-440

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCCN059613247&indx=1&recIds=ETOCCN059613247

Geometrical Aspects of Stress-Induced Voiding in Copper Interconnects
Advanced metallization conference; AMC 2002

Authors: von Glasow, A., Fischer, A. H., Hierlemann, M., Penka, S., Ungar, F.

Source: ADVANCED METALLIZATION CONFERENCE IN. :161-168

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCCN058262790&indx=1&recIds=ETOCCN058262790

Misfortune, challenge, and success: defects in processed semiconductor devices
International conference on defects in semiconductors

Authors: Cerva, H., Engelhardt, M., Hierlemann, M., Polzl, M., Thenikl, T.

Source: PHYSICA B. 308-310:13-17

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCCN047735180&indx=1&recIds=ETOCCN047735180

Modeling of SiGe deposition using quantum chemistry techniques for detailed kinetic analysis
Ab initio approaches to microelectronics materials and process modelling

Authors: Hierlemann, M., Werner, C.

Source: MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING. 3(NO 1-2):31-40

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCCN034565650&indx=1&recIds=ETOCCN034565650

Kinetic Modeling of the Gas Phase Decomposition of Germane by Computational Chemistry Techniques
Proceedings of the Tenth European Conference on Chemical Vapour Deposition

Authors: Hierlemann, M., Simka, H., Jensen, K. F., Utz, M.

Source: JOURNAL DE PHYSIQUE 4. 5(5//V1):C5-71

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCEN029781187&indx=1&recIds=ETOCEN029781187

Strain measurements of ULSI devices using LACBED with TSUPREM modeled displacements
Microscopy of Semiconducting Materials

Authors: Kenda, A., Cerva, H., Pongratz, P., Hierlemann, M., Liebmann, R.

Source: SPRINGER PROCEEDINGS IN PHYSICS. 107:437-440

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCRN186290780&indx=1&recIds=ETOCRN186290780

Equipment simulation of SiGe heteroepitaxy: Model validation by ab initio calculations of surface diffusion processes

Authors: Hierlemann, M., Werner, C., Spitzer, A.

Source: JOURNAL OF VACUUM SCIENCE AND TECHNOLOGY B MICROELECTRONICS AND NANOMETER STRUCTURE. 15(4):935-941

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCRN031010548&indx=1&recIds=ETOCRN031010548

Computational Chemistry Predictions of Kinetics and Major Reaction Pathways for Germane Gas-Phase Reactions

Authors: Simka, H., Hierlemann, M., Utz, M., Jensen, K. F.

Source: JOURNAL- ELECTROCHEMICAL SOCIETY. 143(8):2646-2653

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCRN012824609&indx=1&recIds=ETOCRN012824609

A Reduced-Fluid Dynamic Discharge Model for Applications in Technology-Oriented Computer-Aided Design

Authors: Brinkmann, R. P., Fuerst, R., Werner, C., Hierlemann, M.

Source: JOURNAL- ELECTROCHEMICAL SOCIETY. 143(6):1940-1944

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCRN009449577&indx=1&recIds=ETOCRN009449577

Application of PHOENICS-CVD to epitaxial Si/Ge, polysilicon and silicon deposition in a range of CVD reactors

Authors: Werner, C., Hierlemann, M.

Source: PHOENICS JOURNAL OF COMPUTATIONAL FLUID DYNAMICS AND ITS APPLICATIONS. 8(4):538-552

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCRN003028380&indx=1&recIds=ETOCRN003028380

A gas-phase and surface kinetics model for silicon epitaxial growth with SiH2Cl2 in an RTCVD reactor.

Authors: Hierlemann, M., Kersch, A., Werner, C.

Source: Journal of the Electrochemical Society; January 1995, Vol. 142, p259-266, 8p

Equipment simulation of SiGe heteroepitaxy: Model validation by ab Initio calculations of surface diffusion processes
Physics and chemistry of semiconductor interfaces

Authors: Hierlemann, M., Werner, C., Spitzer, A.

Source: JOURNAL OF VACUUM SCIENCE AND TECHNOLOGY B MICROELECTRONICS AND NANOMETER STRUCTURE. 15(4):935-941

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCCN026048964&indx=1&recIds=ETOCCN026048964

Kinetic Modeling of SiGe Deposition with SiH~2Cl~2 and GeH~4
Chemical vapor deposition

Authors: Hierlemann, M., Werner, C., Schafer, H.

Source: PROCEEDINGS- ELECTROCHEMICAL SOCIETY PV. 96/5:35-40

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCCN017616942&indx=1&recIds=ETOCCN017616942

A Reduced Fluid-Dynamical Discharge Model for Applications in Technology-Oriented CAD
Process control, diagnostics, and modeling in semiconductor manufacturing

Authors: Brinkmann, R. P., Furst, R., Werner, C., Hierlemann, M.

Source: PROCEEDINGS- ELECTROCHEMICAL SOCIETY PV. 95-2:521-529

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCCN012436336&indx=1&recIds=ETOCCN012436336

Application of PHOENICS-CVD to epitaxial Si/Ge, polysilicon and silicon deposition in a range of CVD reactors
Computer simulation of CVD processes

Authors: Werner, C., Hierlemann, M.

Source: PHOENICS JOURNAL OF COMPUTATIONAL FLUID DYNAMICS AND ITS APPLICATIONS. 8(4):538-552

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCCN012354228&indx=1&recIds=ETOCCN012354228