Sub-MM limb observation of stratosphere and mesosphere using ISS/JEM/SMILES

Authors: Suzuki, Makoto, Kikuch, Kenichi, Ochiai, Satoshi, Nishibori, Toshiyuki, Ozeki, Hiroyuki, Mizobuchi, Satoko, Sano, Takuki, Mitsuda, Chihiro, Takahashi, Chikako, Imai, Koji, Manago, Naohiro, Naito, Yoko, Hayashi, Hiroo, Shiotani, Masato

Source: 2012 IEEE International Geoscience and Remote Sensing Symposium Geoscience and Remote Sensing Symposium (IGARSS), 2012 IEEE International. :1286-1289 Jul, 2012

Relation: IGARSS 2012 - 2012 IEEE International Geoscience and Remote Sensing Symposium

18.2 A 1.9TOPS and 564GOPS/W heterogeneous multicore SoC with color-based object classification accelerator for image-recognition applications

Authors: Tanabe, Jun, Toru, Sano, Yamada, Yutaka, Watanabe, Tomoki, Okumura, Mayu, Nishiyama, Manabu, Nomura, Tadakazu, Oma, Kazushige, Sato, Nobuhiro, Banno, Moriyasu, Hayashi, Hiroo, Miyamori, Takashi

Source: 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers Solid- State Circuits Conference - (ISSCC), 2015 IEEE International. :1-3 Feb, 2015

Relation: 2015 IEEE International Solid- State Circuits Conference - (ISSCC)

SpursEngine™ a high-performance stream processor derived from cell/B.E.™ for media processing acceleration

Authors: Hayashi, Hiroo

Source: 2008 IEEE Hot Chips 20 Symposium (HCS) Hot Chips 20 Symposium (HCS), 2008 IEEE. :1-38 Aug, 2008

Relation: 2008 IEEE Hot Chips 20 Symposium (HCS)

Session 14 overview: Digital PLLs and SoC building blocks: High-performance digital subcommittee

Authors: Hill, Anthony, Hayashi, Hiroo

Source: 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers Solid- State Circuits Conference - (ISSCC), 2015 IEEE International. :250-251 Feb, 2015

Relation: 2015 IEEE International Solid- State Circuits Conference - (ISSCC)

Session 15 overview: Digital PLLs: High-performance digital subcommittee

Authors: Hill, Anthony, Hayashi, Hiroo

Source: 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 IEEE International. :264-265 Feb, 2014

Relation: 2014 IEEE International Solid- State Circuits Conference (ISSCC)

A 464GOPS 620GOPS/W heterogeneous multi-core SoC for image-recognition applications

Authors: Tanabe, Yasuki, Sumiyoshi, Masato, Nishiyama, Manabu, Yamazaki, Itaru, Fujii, Shinsuke, Kimura, Katsuyuki, Aoyama, Takuma, Banno, Moriyasu, Hayashi, Hiroo, Miyamori, Takashi

Source: 2012 IEEE International Solid-State Circuits Conference Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International. :222-223 Feb, 2012

Relation: 2012 IEEE International Solid- State Circuits Conference - (ISSCC)

Session 14 overview: Digital clocking and PLLs: High-performance digital subcommittee

Authors: Hill, Anthony, Hayashi, Hiroo

Source: 2012 IEEE International Solid-State Circuits Conference Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International. :238-239 Feb, 2012

Relation: 2012 IEEE International Solid- State Circuits Conference - (ISSCC)

Time-resolved stopped-flow x-ray absorption fine structure system using synchrotron radiation for fast reactions in solution.

Authors: Inada, Yasuhiro, Hayashi, Hiroo, Funahashi, Shigenobu

Source: Review of Scientific Instruments; August 1997, Vol. 68, p2973-2977, 5p

Capability for ozone high-precision retrieval on JEM/SMILES observation

Authors: Takahashi, Chikako, Suzuki, Makoto, Mitsuda, Chihiro, Ochiai, Satoshi, Manago, Naohiro, Hayashi, Hiroo, Iwata, Yoshitaka, Imai, Koji, Sano, Takuki, Takayanagi, Masahiro, Shiotani, Masato

Source: In Advances in Space Research 2011 48(6):1076-1085

Virtual address cache memory, processor and multiprocessor

Systems and methods for transferring data to maintain preferred slot positions in a bi-endian processor

OPENABLE AND CLOSABLE CONTAINER

VIRTUAL ADDRESS CACHE MEMORY, PROCESSOR AND MULTIPROCESSOR

Systems and Methods for Transferring Data to Maintain Preferred Slot Positions in a Bi-endian Processor

Self-organized parallel processing system

PROCESSOR AND PROCESSOR CONTROL METHOD

EFFECTIVE ADDRESS CACHE MEMORY, PROCESSOR AND EFFECTIVE ADDRESS CACHING METHOD

SET ASSOCIATIVE CACHE APPARATUS, SET ASSOCIATIVE CACHE METHOD AND PROCESSOR SYSTEM

Method, system and apparatus for generation of global branch history

Self-Organized Parallel Processing System