A nonvolatile look-up table using ReRAM for reconfigurable logic

Authors: Lin, Wen-Pin, Sheu, Shyh-Shyuan, Kuo, Chia-Chen, Tseng, Pei-Ling, Chang, Meng-Fan, Su, Keng-Li, Lin, Chih-Sheng, Tsai, Kan-Hsueh, Lee, Sih-Han, Liu, Szu-Chieh, Chen, Yu-Sheng, Lee, Heng-Yuan, Hsu, Ching-Chih, Chen, Frederick T., Ku, Tzu-Kun, Tsai, Ming-Jinn, Kao, Ming-Jer

Source: 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC) Solid-State Circuits Conference (A-SSCC), 2014 IEEE Asian. :133-136 Nov, 2014

Relation: 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC)

A ReRAM integrated 7T2R non-volatile SRAM for normally-off computing application

Authors: Sheu, Shyh-Shyuan, Kuo, Chia-Chen, Chang, Meng-Fan, Tseng, Pei-Ling, Chih-Sheng, Lin, Wang, Min-Chuan, Lin, Chih-He, Lin, Wen-Pin, Chien, Tsai-Kan, Lee, Sih-Han, Liu, Szu-Chieh, Lee, Heng-Yuan, Chen, Pang-Shiu, Chen, Yu-Sheng, Hsu, Ching-Chih, Chen, Frederick T., Su, Keng-Li, Ku, Tzu-Kun, Tsai, Ming-Jinn, Kao, Ming-Jer

Source: 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) Solid-State Circuits Conference (A-SSCC), 2013 IEEE Asian. :245-248 Nov, 2013

Relation: 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)

Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory

Authors: Chang, Meng-Fan, Lin, Ku-Feng, Chuang, Ching-Hao, Huang, Li-Yue, Chien, Tun-Fei, Sheu, Shyh-Shyuan, Su, Keng-Li, Lee, Heng-Yuan, Chen, Frederick T., Lien, Chen-Hsin, Chen, Ping-Cheng, Chiou, Lih-Yih, Ku, Tzu-Kun, Tsai, Ming-Jinn, Kao, Ming-Jer

Source: 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on. :1-4 Oct, 2012

Relation: 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

Effect of Ti buffer layer on HfOx-based bipolar and complementary resistive switching for future memory applications

Authors: Rahaman, Sk. Ziaur, Lin, Yu-De, Gu, Pei-Yi, Lee, Heng-Yuan, Chen, Yu-Sheng, Chen, Pan-Shiu, Tsai, Kan-Hsueh, Chen, Wei-Su, Hsu, Chien-Hua, Tu, Po-Tsung, Chen, Frederick T., Tsai, Ming-Jinn, Ku, Tzu-Kun, Wang, Pei-Hua

Source: 2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) VLSI Technology, Systems and Application (VLSI-TSA), 2016 International Symposium on. :1-2 Apr, 2016

Relation: 2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)

A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability

Authors: Sheu, Shyh-Shyuan, Chang, Meng-Fan, Lin, Ku-Feng, Wu, Che-Wei, Chen, Yu-Sheng, Chiu, Pi-Feng, Kuo, Chia-Chen, Yang, Yih-Shan, Chiang, Pei-Chia, Lin, Wen-Pin, Lin, Che-He, Lee, Heng-Yuan, Gu, Pei-Yi, Wang, Sum-Min, Chen, Frederick T., Su, Keng-Li, Lien, Chen-Hsin, Cheng, Kuo-Hsing, Wu, Hsin-Tun, Ku, Tzu-Kun, Kao, Ming-Jer, Tsai, Ming-Jinn

Source: 2011 IEEE International Solid-State Circuits Conference Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International. :200-202 Feb, 2011

Relation: 2011 IEEE International Solid- State Circuits Conference - (ISSCC)

Fast-Write Resistive RAM (RRAM) for Embedded Applications

Authors: Sheu, Shyh-Shyuan, Cheng, Kuo-Hsing, Chang, Meng-Fan, Chiang, Pei-Chia, Lin, Wen-Pin, Lee, Heng-Yuan, Chen, Pang-Shiu, Chen, Yu-Sheng, Wu, Tai-Yuan, Chen, Frederick T., Su, Keng-Li, Kao, Ming-Jer, Tsai, Ming-Jinn

Source: IEEE Design & Test of Computers IEEE Des. Test. Comput. Design & Test of Computers, IEEE. 28(1):64-71 Jan, 2011

ReRAM-based 4T2R nonvolatile TCAM with 7x NVM-stress reduction, and 4x improvement in speed-wordlength-capacity for normally-off instant-on filter-based search engines used in big-data processing

Authors: Li-Yue Huang, Meng-Fan Chang, Ching-Hao Chuang, Chia-Chen Kuo, Chien-Fu Chen, Geng-Hau Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu, Keng-Li Su, Chen, Frederick T., Tzu-Kun Ku, Ming-Jinn Tsai, Ming-Jer Kao

Source: 2014 Symposium on VLSI Circuits Digest of Technical Papers VLSI Circuits Digest of Technical Papers, 2014 Symposium on. :1-2 Jun, 2014

Relation: 2014 IEEE Symposium on VLSI Circuits

A 5ns fast write multi-level non-volatile 1 K bits RRAM memory with advance write scheme

Authors: Sheu, Shyh-Shyuan, Chiang, Pei-Chia, Lin, Wen-Pin, Lee, Heng-Yuan, Chen, Pang-Shiu, Chen, Yu-Sheng, Wu, Tai-Yuan, Chen, Frederick T., Su, Keng-Li, Kao, Ming-Jer, Cheng, Kuo-Hsing, Tsai, Ming-Jinn

Source: 2009 Symposium on VLSI Circuits VLSI Circuits, 2009 Symposium on. :82-83 Jun, 2009

Relation: 2009 Symposium on VLSI Circuits

Multi-level phase change memory using slow-quench operation: GST vs. GSST

Authors: Chao, Der-Sheng, Chen, Frederick T., Yen-Ya Hsu, Wen-Hsing Liu, Lee, Chain-Ming, Chih-Wei Chen, Wei-Su Chen, Ming-Jer Kao, Ming-Jinn Tsai

Source: 2009 International Symposium on VLSI Technology, Systems, and Applications VLSI Technology, Systems, and Applications, 2009. VLSI-TSA '09. International Symposium on. :39-40 Apr, 2009

Relation: 2009 International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA)

Data retention statistics and modelling in HfO2 resistive switching memories

Authors: Ambrogio, Stefano, Balatti, Simone, Wang, Zhong Qiang, Chen, Yu-Sheng, Lee, Heng-Yuan, Chen, Frederick T., Ielmini, Daniele

Source: 2015 IEEE International Reliability Physics Symposium Reliability Physics Symposium (IRPS), 2015 IEEE International. :MY.7.1-MY.7.6 Apr, 2015

Relation: 2015 IEEE International Reliability Physics Symposium (IRPS)

Area-efficient embedded RRAM macros with sub-5ns random-read-access-time using logic-process parasitic-BJT-switch (0T1R) cell and read-disturb-free temperature-aware current-mode read scheme

Authors: Chang, Meng-Fan, Kuo, Chia-Cheng, Sheu, Shyh-Shyuan, Lin, Chorng-Jung, King, Ya-Chin, Lin, Zhe-Hui, Su, Keng-Li, Chen, Yu-Sheng, Lin, Wen-Pin, Lee, Heng-Yuan, Tsai, Chen-Han, Chen, Wei-Su, Chen, Frederick T., Ku, Tzu-Kun, Kao, Ming-Jer, Tsai, Ming-Jinn, Wu, Jui-Jen, Chih, Yu-Der, Natarajan, Sreedhar

Source: 2013 Symposium on VLSI Technology VLSI Technology (VLSIT), 2013 Symposium on. :C112-C113 Jun, 2013

Relation: 2013 Symposium on VLSI Technology

A low store energy, low VDDmin, nonvolatile 8T2R SRAM with 3D stacked RRAM devices for low power mobile applications

Authors: Chiu, Pi-Feng, Chang, Meng-Fan, Sheu, Shyh-Shyuan, Lin, Ku-Feng, Chiang, Pei-Chia, Wu, Che-Wei, Lin, Wen-Pin, Lin, Chih-He, Hsu, Ching-Chih, Chen, Frederick T., Su, Keng-Li, Kao, Ming-Jer, Tsai, Ming-Jinn

Source: 2010 Symposium on VLSI Circuits VLSI Circuits (VLSIC), 2010 IEEE Symposium on. :229-230 Jun, 2010

Relation: 2010 IEEE Symposium on VLSI Circuits

Resistance instabilities in a filament-based resistive memory

Authors: Chen, Frederick T., Lee, Heng-Yuan, Chen, Yu-Sheng, Rahaman, Shakh Ziaur, Tsai, Chen-Han, Tsai, Kan-Hsueh, Wu, Tai-Yuan, Chen, Wei-Su, Gu, Pei-Yi, Lin, Yu-De, Sheu, Shyh-Shyuan, Tsai, Ming-Jinn, Lee, Li-Heng, Ku, Tzu-Kun, Chen, Pang-Shiu

Source: 2013 IEEE International Reliability Physics Symposium (IRPS) Reliability Physics Symposium (IRPS), 2013 IEEE International. :5E.1.1-5E.1.7 Apr, 2013

Relation: 2013 IEEE International Reliability Physics Symposium (IRPS)

Statistical analysis of retention behavior and lifetime prediction of HfOBxB-based RRAM

Authors: Zhang, Lijie, Huang, Ru, Hsu, Yen-Ya, Chen, Frederick T., Lee, Heng-Yuan, Chen, Yu-Sheng, Chen, Wei-Su, Gu, Pei-Yi, Liu, Wen-Hsing, Wang, Shun-Min, Tsai, Chen-Han, Tsai, Ming-Jinn, Chen, Pang-Shiu

Source: 2011 International Reliability Physics Symposium Reliability Physics Symposium (IRPS), 2011 IEEE International. :MY.8.1-MY.8.5 Apr, 2011

Relation: 2011 IEEE International Reliability Physics Symposium (IRPS)

Three-dimensional 4F2 ReRAM cell with CMOS logic compatible process

Authors: Ching-Hua Wang, Yi-Hung Tsai, Kai-Chun Lin, Meng-Fan Chang, Ya-Chin King, Chrong-Jung Lin, Shyh-Shyuan Sheu, Chen, Yu-Sheng, Lee, Heng-Yuan, Chen, Frederick T., Ming-Jinn Tsai

Source: 2010 International Electron Devices Meeting Electron Devices Meeting (IEDM), 2010 IEEE International. :29.6.1-29.6.4 Dec, 2010

Relation: 2010 IEEE International Electron Devices Meeting (IEDM)

Model of current-limited negative differential resistance in oxide-based resistance-switching devices

Authors: Chen, Frederick T.

Source: In Solid State Electronics January 2015 103:59-63

RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme

Authors: Chen, Ching-Yi, Shih, Hsiu-Chuan, Wu, Cheng-Wen, Lin, Chih-He, Chiu, Pi-Feng, Sheu, Shyh-Shyuan, Chen, Frederick T.

Source: IEEE transactions on computers. 64(1):180-190

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCvdc_100155642728.0x000001&indx=1&recIds=ETOCvdc_100155642728.0x000001

Metal–Oxide RRAM

Authors: Wong, H.-S. Philip, Lee, Heng-Yuan, Yu, Shimeng, Chen, Yu-Sheng, Wu, Yi, Chen, Pang-Shiu, Lee, Byoungil, Chen, Frederick T., Tsai, Ming-Jinn

Source: Proceedings of the IEEE. 100(6):1951-1970

Availability: http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCvdc_100098401840.0x000001&indx=1&recIds=ETOCvdc_100098401840.0x000001

Antimony alloys for phase-change memory with high thermal stability

Authors: Kao, Kin-Fu, Chang, Chih-Chung, Chen, Frederick T., Tsai, Ming-Jinn, Chin, Tsung-Shune

Source: In Scripta Materialia 2010 63(8):855-858

Control method for memory cell