RedMulE-FT: A Reconfigurable Fault-Tolerant Matrix Multiplication Engine

Authors: Wiese, Philip, Item, Maurus, Bertaccini, Luca, Tortorella, Yvan, Garofalo, Angelo, Benini, Luca

Subject Terms: Computer Science - Hardware Architecture, B.7.3, B.8.1

Access URL: http://arxiv.org/abs/2504.14399

PowerRadio: Manipulate Sensor Measurementvia Power GND Radiation

Authors: Jiang, Yan, Ji, Xiaoyu, Jiang, Yancheng, Wang, Kai, Xu, Chenren, Xu, Wenyuan

Subject Terms: Electrical Engineering and Systems Science - Signal Processing, 15A06, B.7.3, B.8.1, J.2

Access URL: http://arxiv.org/abs/2412.18103

An Evidence-Based Curriculum Initiative for Hardware Reverse Engineering Education

Authors: Walendy, René, Weber, Markus, Becker, Steffen, Paar, Christof, Rummel, Nikol

Subject Terms: Computer Science - Computers and Society, K.3.2, B.7.3

Access URL: http://arxiv.org/abs/2411.05588

A Crosstalk-Aware Timing Prediction Method in Routing

Authors: Jin, Leilei, Xu, Jiajie, Fu, Wenjie, Yan, Hao, Shi, Longxing

Subject Terms: Electrical Engineering and Systems Science - Systems and Control, I.6.4, B.7.3

Access URL: http://arxiv.org/abs/2403.04145

Locality and Utilization in Placement Suboptimality

Authors: Cong, Jason, Romesis, Michalis, Shinnerl, Joseph R., Sze, Kenton, Xie, Min

Source: Chapter 2 from Gi-Joon Nam and Jason Cong, Modern Circuit Placement Best Practices and Results, 2007, Springer, reproduced with permission of Springer Science+Business Media, LLC

Subject Terms: Computer Science - Networking and Internet Architecture, B.7.2, B.7.3, B.8.2, G.4, J.6

Access URL: http://arxiv.org/abs/2305.16413

ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key

Authors: Wang, Jianfeng, Chen, Zhonghao, Zhang, Jiahao, Xu, Yixin, Yu, Tongguang, Ye, Enze, Zheng, Ziheng, Yang, Huazhong, George, Sumitha, Liu, Yongpan, Narayanan, Vijaykrishnan, Li, Xueqing

Source: ACM Transactions on Design Automation of Electronic Systems 2024

Subject Terms: Computer Science - Hardware Architecture, B.2.3, B.6.2, B.7.3

Access URL: http://arxiv.org/abs/2206.08087

Understanding Tool Synthesis Behavior and Safe Finite State Machine Design

Authors: Liszewski, Katie, McDonley, Timothy

Subject Terms: Computer Science - Hardware Architecture, B.7.3, B.7.1

Access URL: http://arxiv.org/abs/2108.04042

A Post-Silicon Trace Analysis Approach for System-on-Chip Protocol Debug

Authors: Cao, Yuting, Zheng, Hao, Ray, Sandip, Yang, Jin

Subject Terms: Computer Science - Hardware Architecture, B.5.3, B.7.3

Access URL: http://arxiv.org/abs/2005.02550